The invention lies in the area of the fabrication of silicon-on-insulator substrates known to persons skilled in the art under the acronym “SOI.”
A SOI substrate comprises a silicon oxide SiO2 layer, buried between a silicon carrier substrate and a silicon surface layer called the “active layer” since it is on or in this layer that components will subsequently be fabricated intended for applications in the areas of electronics, optics, optoelectronics or microelectronics.
The present invention more specifically concerns a method to thin an initial substrate of SOI type, making it possible to obtain a SOI substrate having a silicon surface layer that is thin, even extra-thin, and whose surface is free or almost free of polluting particles.
The integration of transistors in microelectronics is made with increasingly smaller dimensions, since it is desired to increase the number of transistors packed on a wafer (or substrate). Breaking the “technological barrier of 22 nanometers,” i.e., fabricating transistors having a width of 22 nanometers or less, may lead to requiring the use of SOI substrates known to those skilled in the art as “fully depleted” substrates.
In the substrates, the silicon surface layer forms a so-called “depletion” layer in which the concentration of mobile charges is much lower than the equilibrium concentration.
The fabrication of a “fully depleted” transistor requires a reduction in the thickness of the active silicon surface layer, which on this account must be equal to or less than 50 nanometers, preferably in the order of 10 nanometers to 30 nanometers.
It is also to be noted that the thickness of the buried oxide layer can also be reduced, i.e., to less than 15 nanometers, if it is desired to use this type of SOI substrate for the fabrication of components intended for applications of “low power” or “memory” type.
The thinner the desired active silicon surface layer, the more it is required to remove a substantial quantity of material from the initial SOI substrate.
When it is desired to thin the active silicon surface layer of the substrate, notably by etching, it is ascertained that the edges of the wafers are fragile, that they may break and form particles that are re-deposited on the active layer, thereby polluting this layer.
Also, with state of the art methods to fabricate SOI substrates, it is known to conduct treatment called Rapid Thermal Annealing (RTA). It is known that the effect of this treatment is to reduce the roughness of the silicon surface layer to achieve smoothing thereof.
It is also known from document FR-2 852 143 by the applicant, that RTA treatment can have the effect of overlapping and encapsulating the peripheral edge of the buried oxide layer of the SOI substrate, and that this encapsulation can prevent chemical attack and delamination of the edge of the buried oxide layer during a subsequent treatment step of the substrate.
The RTA treatment is therefore routinely conducted during the finishing steps of a SOI substrate.
However, the applicant has found that when the active silicon layer is considerably thinned, the so-called “encapsulation” layer, i.e., the layer facing the peripheral edge of the buried oxide, becomes damaged and no longer fulfils its protective role.
Appended FIG. 1, showing the state of the art, illustrates an encapsulation layer CE partly encapsulating the edge of a substrate SOI whose active silicon layer CA has a thickness of at least 100 nanometers. This encapsulation layer is consolidated by the onset of silicon bridges PT generated during RTA treatment.
The perspective diagram in FIG. 1A also shows the bridges PT and an oxide layer OX which can be seen at certain points between the bridges PT.
On the other hand, and as can be seen in appended FIG. 2, which illustrates a test result obtained by the applicant, if it is sought to further thin the active silicon layer CA of a substrate SOI, using a thermal oxidation process followed by an etching step, it is found that the bridges PT are either broken or have disappeared.
In this case, after the treatment, since the encapsulation layer is strongly damaged or has disappeared, the chemical product used for etching infiltrates the interface between the buried oxide layer and the surface silicon. The edge of the substrate lifts up and particles of silicon, and silicon together with oxide remnants, may break up and re-deposit on the active surface layer of the SOI substrate. Therefore substantial pollution of the substrate is observed, making it unfit for subsequent use in component fabrication. Additionally, the polluting particles may scratch the surface of the SOI substrate.
The person skilled in the art is therefore dissuaded from using etching to thin a SOI substrate, whether or not the substrate had undergone RTA treatment.
The objective of the invention is to solve the above-cited drawbacks of the prior art.